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Definition of "reset scrambling" |
a technique of randomizing a source bit sequence by adding the sequence to a pseudo-random bit stream using element-wise modulo-2 arithmetic. The source sequence is recovered at the decoder through addition of the demodulated bit stream with the same pseudo-random sequence. The pseudo-random sequences are usually generated with linear feedback shift registers which must be aligned with a reset or framing signal in order to recover the source sequence accurately. |
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