Electrical Engineering ⇒ Topic : Laws of Complement
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Laws of Complement According to these laws if one applies a logic signal and its complement to an AND gate, the output will be 0 logic. It is shown in Figure 1 (a). Algebraically, it means that A . ‾A =0
FIGURE (1) If one applies a logic signal and its complement to an OR gate, the output will be 1 logic which is illustrated in Figure 1(b). Algebraically, it means that A + ‾A =1 | |
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