Electrical Engineering ⇒ Topic : Voltage Divider Biasing Circuit

Voltage Divider Biasing Circuit

The voltage divider biasing circuit is shown in Figure (a).

                            Figure (a) Voltage divider bias.

Since, I_G = 0, we can write

The simplified voltage divider bias circuit is shown in Figure (b).

Applying KVL to input circuit, we get

                Figure (b) Simplified voltage divider bias circuit.

Applying KVL to output circuit, we get